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1 : /****************************************************************************** 2 : * ETSI TS 103 634 V1.5.1 * 3 : * Low Complexity Communication Codec Plus (LC3plus) * 4 : * * 5 : * Copyright licence is solely granted through ETSI Intellectual Property * 6 : * Rights Policy, 3rd April 2019. No patent licence is granted by implication, * 7 : * estoppel or otherwise. * 8 : ******************************************************************************/ 9 : 10 : #include "defines.h" 11 : #include "functions.h" 12 : 13 : /* 14 : st_PhECU_f0minLtp=55; % 55.4 Hz 15 : st_PhECU_f0maxLtp=376; % 376.4706 Hz 16 : 17 : */ 18 : 19 : 20 : Word16 21 0 : plc_phEcuSetF0Hz_fx(/* output Q7 bin frequency [0.. 255.xxxx] "1 sign, 8 bits mantissa, 7 binomial" [0-255.9999] */ 22 : Word16 fs_idx, Word16 old_pitch_int, Word16 old_pitch_fr) 23 : { 24 : Word16 pitch_lagQ2, result, expo; 25 : Word32 L_result, L_tmp; 26 : 27 : #ifdef DYNMEM_COUNT 28 : Dyn_Mem_In("plc_phEcuSetF0Hz_fx", sizeof(struct { 29 : Word16 pitch_lagQ2, result, expo; 30 : Word32 L_result, L_tmp; 31 : Word16 num_FsByResQ0[5]; 32 : })); 33 : #endif 34 : 35 : #ifdef WMOPS 36 : push_wmops("PhECU::plc_phEcuSetF0Hz_fx"); 37 : #endif 38 : 39 0 : result = 0; move16(); 40 0 : IF (old_pitch_int != 0) 41 : { 42 0 : pitch_lagQ2 = add( 43 : old_pitch_fr, 44 0 : shl(old_pitch_int, 2)); /* lag at the current fs_idx , max lag_value is is 228(+.75)*48/12.8 = 858 in Q0 */ 45 : 46 0 : L_result = plc_phEcu_ratio_fx(L_deposit_h(num_FsByResQ0[fs_idx]), L_deposit_h(pitch_lagQ2), &expo); 47 0 : L_tmp = L_shl_sat(L_result, sub(11, expo)); /* move to Q7, in high word to allow round*/ 48 0 : result = round_fx(L_tmp); 49 : } 50 : #ifdef DYNMEM_COUNT 51 : Dyn_Mem_Out(); 52 : #endif 53 : #ifdef WMOPS 54 : pop_wmops(); 55 : #endif 56 : 57 0 : return result; /*Q7*/ 58 : } 59 : 60 :